fupsrl

09 – Bench Bring-Up and Validation Plan

1 min read Updated 16 July 2026

A controlled bench plan turns a complex ECU board into a testable system. Do not jump from a fresh assembly to a running engine. Build evidence in stages and keep each stage repeatable.

Stage 1 – Unpowered inspection

  • Inspect PCB revision, population, soldering, connector orientation and harness continuity.
  • Check for shorts between power rails and ground.
  • Confirm protective components, fuses and load paths match the build record.

Stage 2 – Logic power

  • Use a current-limited supply and record voltage/current.
  • Flash the STM32 through ST-LINK.
  • Confirm boot, clock, debug access and CAN telemetry with all actuators disconnected.

Stage 3 – Trigger and synchronization

  • Use a generator or motored signal source.
  • Capture the electrical waveform and verify decoded RPM, angle and phase.
  • Test missing-tooth, drop-out, noise and re-synchronization cases.

Stage 4 – Outputs

  • Prove inactive polarity after boot/reset.
  • Use passive/representative loads first.
  • Measure timing, duration, thermal behaviour and all-off response.

Stage 5 – Integrated test

Only after passing the earlier stages should an engine-adjacent test begin. Start with a defined abort condition, fire suppression, fuel isolation, a second observer and logging. Review evidence after each change; do not stack firmware, harness and calibration changes in the same test.

Suggested screenshots: a numbered bench setup photo and a validation checklist spreadsheet or log excerpt.